Power Analysis / EMIR Engineer

Job description Key Skills: Voltus, Cadence, Redhawk, PTP, Python, TCL, Shell Roles and Responsibilities: Perform static and dynamic IR drop analysis at block, subsystem, and SoC levels. Analyze and close Power EM and Signal EM violations according to foundry reliability rules. Support PDN design and optimization activities, including mesh/strap/via enhancement recommendations. Run thermal analysis and correlate power, timing, and reliability results for clean signoff. Collaborate with Physical Design teams during floorplanning, power planning, and routing; support silicon bring-up and late-stage signoff escalations. Skills Required: 3 to 15+ years of experience in power integrity, EM/IR analysis, and reliability signoff for ASIC/SoC designs. Hands-on power integrity and EM/IR analysis using RedHawk, RedHawk-SC, Totem, Voltus, and PTPX. Physical design awareness and integration with ICC2 and Fusion Compiler for power planning and routing context. Ability to interpret rail drop, current density, hotspots, and reliability metrics to drive closure. Experience supporting signoff workflows and late-stage correlation for power-related issues. Good to Have: Innovus and PrimeTime for broader design and timing correlation workflows. RedHawk Thermal for thermal analysis depth and reporting. Scripting experience with Tcl; Python and Shell for automation and analysis support.